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Mark D. Poliks, Ph.D. 607-755-2064 (office) |
Education |
Recent Patents: (27 issued US patents, 5 patents pending) “Lamination of Liquid Crystal Polymer Dielectric Films” D. S. Farquhar and M. D. Poliks, US 6,819,373; November 16, 2004. “Method for Making Printed Circuit Board having Low Coefficient of Thermal Expansion Power/Ground Plane” R. M. Japp and M. D. Poliks, US 6,722,031, April 20, 2004. “Tamper-Responding Encalsulated Enclosure having Flexible Protective Mesh Structure” D. S. Farquhar, C. Feger, V. Markovich, K. I. Papathomas, M. D. Poliks, J. M. Shaw, G. Szeparowycz, S. H. Weingart, US 6,686,539, February 3, 2004. “Method and Structure for Producing Z-axis Interconnection Assembly of Printed Wiring Board Elements” B. E. Curcio, D. S. Farquhar, K. I. Papathomas and M. D. Poliks, US 6,645,607, November 11, 2003. “Porous Power and Ground Planes for Reduced PCB Delamination and Better Reliability” R. M. Japp and M. D. Poliks, US 6,613,413, September 2, 2003. “Thin Film Attachment to Laminate Using a Dendritic Interconnection” D. S. Farquhar, R. T. Galasco, S. K. Kang, M. D. Poliks, C. Prasad, R. Yu, US 6,600,224, June 29, 2003. |